Organic Thin Film Transistor Integration: A Hybrid Approach

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Figure 1c,d shows scanning electron microscopic images illustrating the CNT network and IGZO thin film in the channel of p-type and n-type transistors, respectively. The result has provided evidence for the applicability of large-scale integration of flexible electronics using CNT TFTs. The details of the electrical characterizations can be found in the Methods section.

The inset shows a stage ring oscillator on the rigid substrate. Based on the scanning electron microscopic image of the CNTs in the device channel Fig. The metrics of performance of the p-type devices can be readily controlled by varying the density of the CNTs in the channel through modification of the CNT incubation time The mobility was calculated based on the formula, , where C was the gate capacitance estimated with the network model The transistor can be fully saturated as depicted in Fig.

Based on the results presented in Fig.

Thin-film hybrid oxide-organic microprocessor

Circuits operating in complementary mode can be actualized with the desirable p-type and n-type behaviour of these TFTs. The fabrication process of the devices based on the two materials can be conducted at room temperature, which is compatible with the current flat-panel display manufacturing processes, and it is also desirable for flexible electronics. Figure 3 describes the operation of hybrid inverters Fig.

The inverter exhibits an ideal rail-to-rail output voltage behaviour as can be seen in Fig. The inverter exhibits a voltage gain of 15 as shown in Fig. This demonstrates the high yield and practicality of implementing this hybrid circuit scheme for both rigid and flexible circuit applications. The uniformity of the performance of the 20 inverters in terms of their voltage gain and threshold voltage is shown in Fig. V DD is designated as the supplied voltage of the circuits. V OUT corresponds to the output signal of the circuits. V IN corresponds to the input signal of the inverter and GND is designated as the ground of the circuits.

In that logic configuration, both of the p-type CNT transistors are turned off. This logic corresponds to both of the n-type IGZO transistors are turned off. The circuits return correct output signal based on the corresponding input logics. This enables us to further explore the possibility of more complex digital circuits with the hybrid circuit design. V A and V B are used to designate the two input signals of circuits. Same denotation of the labels is applied to the schematic of the NOR gate. Figure 5 describes the operation of stage, stage, stage and stage ring oscillators on rigid substrate.

The optical micrographs and output signals of the oscillators are depicted in Fig. The circuit configuration is adopted for all of the oscillators presented in this work. The oscillation frequency of ring oscillators decreases with increase in number of stages due to the effect of stage delay. This effect is depicted in Fig. We note that our ring oscillator performance compares favourably with previously published work For instance, all of our ring oscillators exhibited rail-to-rail switching between V DD and ground. In comparison, previous work based on p-type-only inverters showed oscillation that reached neither V DD nor ground The star circled by red ink corresponds to our work.

This large-scale integrated circuit is consisted of inverters and a buffer stage. CNT transistors exhibited little degradation. After being stored in vacuum for 1 month, the stage ring oscillator still operated correctly, however, with deteriorated output amplitude. Further passivation of the samples using dielectric material coating for example, Al 2 O 3 should alleviate or eliminate the effect of degradation of the IGZO TFTs 53 , Figure 5j delineates the progress of the level of integration of carbon nanotube-based circuits since the year , including the result from our study and data reported by other research teams 19 , 20 , 21 , 22 , 23 , 25 , 26 , 27 , 44 , 55 , 56 , 57 , 58 , 59 , 60 , 61 , 62 , 63 , A general trend of increment in the level of integration can be observed on the graph, and we have realized the first demonstration of large-scale integrated circuits based on hybrid integration of CNT transistors and IGZO transistors.

Figure 7a—c illustrates the performance of a dynamic inverter. In a dynamic inverter, a clock signal is sent into the circuit. When the clock signal is low, M1 is turned on to precharge the output parasitic capacitance to the level of V DD , and M2 is off during this cycle of operation, and hence the input cannot affect the output when the clock signal is low.

When the clock signal is changed to high, M1 is turned off and now M2 is on, at which the output is determined by the input signal, and this is the evaluating stage. To the best of our knowledge, our report is the first demonstration of using CNT in a dynamic gate-integrated circuit. The middle panel and the lower panel of Fig. When the clock is high, the output is an inverted signal of the input, as expected. It generates correct output corresponding to the specific input signals as illustrated in Fig. A dynamic NOR gate and its output characteristic are exemplified in Fig.

It provides evidence that our hybrid circuit scheme can enable the integration of more complicated circuits with the dynamic circuit-building blocks. Having the circuits operated in complementary mode can minimize the static-state power dissipation in the circuits. We have also demonstrated the operation of the circuits on a flexible PI substrate and the high yield of the devices on the substrate.

Currently, the IGZO thin film employed in our circuits were fabricated with the sputtering technique; however, the material can also be printed during the fabrication procedure CNT thin film has also been demonstrated to exhibit desirable printability and performance for printed electronics Our approach of hybrid integration of p-type nanomaterial, in this case CNT and n-type oxide semiconductor, in this study, IGZO thin-film transistors, can have great impact on various macroelectronic applications. In order to deposit carbon nanotube onto the dielectric material, the sample was functionalized by poly- L -lysine 0.

Then, the sample was cleansed by DI water to remove the solution. Next, the solution of 0. The IGZO channels were defined by standard photolithography. The second layer of PI was spun onto the sample and baked at the same conditions. The circuits were then fabricated onto the PI substrate based on the procedure described in the previous paragraph. Input signals were supplied to the circuits with the Analyzer and the output signals were recorded with the oscilloscope.

The flexible circuits were characterized with the same instruments as their rigid circuits counterparts. How to cite this article: Chen, H. Large-scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin-film transistors. Reuss, R. Macroelectronics: perspectives on technology and applications. IEEE 93 , — Wang, C. Carbon nanotube electronics—moving forward.

CiteSeerX — High-performance transparent thin-film transistors

Mei, J. Integrated materials design of organic semiconductors for field-effect transistors. Fortunato, E. Oxide semiconductor thin-film transistors: a review of recent advances. Sirringhaus, H. Nielsen, C. Recent advances in the development of semiconducting dpp-containing polymers for transistor applications. Myny, K. IEEE J. Solid-State Circuits 47 , — Stingelin-Stutzmann, N. Organic thin-film electronics from vitreous solution-processed rubrene hypereutectics.

Forrest, S. The path to ubiquitous and low-cost organic electronic appliances on plastic. Nature , — Payne, M. Park, J. Review of recent developments in amorphous oxide semiconductor thin-film transistor devices. Thin Solid Films , — Wager, J. An amorphous oxide semiconductor thin-film transistor route to oxide electronics.

Solid State Mater. Kamiya, T. Present status of amorphous In—Ga—Zn—O thin-film transistors. Jae Kyeong, J. The status and perspectives of metal oxide thin-film transistors for active matrix flexible displays. Yabuta, H. Sputtering formation of p-type SnO thin-film transistors on glass toward oxide complimentary circuits. Zou, X. IEEE Trans. Electron Devices 58 , — Zhang, J. Separated carbon nanotube macroelectronics for active matrix organic light-emitting diode displays. Nano Lett. ACS Nano 6 , — Cao, Q. Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates.

Macroelectronic integrated circuits using high-performance separated carbon nanotube thin-film transistors. ACS Nano 4 , — Sun, D. Flexible high-performance carbon nanotube integrated circuits. Nano 6 , — Gao, P. Complementary logic gate arrays based on carbon nanotube network transistors. Small 9 , — Mouldable all-carbon integrated circuits. Snow, E. Random networks of carbon nanotubes as an electronic material.

Ha, M. Printed, sub-3V digital circuits on plastic from aqueous carbon nanotube inks. Jinsoo, N. Fully gravure-printed d flip-flop on plastic foils using single-walled carbon-nanotube-based TFTs. Fully gravure-printed flexible full adder using swnt-based tfts. Minhun, J. All-printed and roll-to-roll-printable Electron Device 57 , — Takahashi, T. TFT device response parameters are summarized in Table 2.

This large value represents the highest field-effect mobility in room-temperature TFTs and thus is very promising for high-speed electronics. The threshold voltage V T of the present devices is only 0. On the other hand, the value of interfacial trap densities on PET is found to be greater than that on silicon substrates, which also partially explains the smaller mobilities on PET. No significant changes or residual effects were observed when the bending radius of curvature is as low as 4 cm.

That these hybrid TFTs on plastic substrates are colorless and highly transparent is shown by transmission optical spectra and the photo image FIG. As demonstrated, representative inorganic-organic hybrid TFTs have been fabricated at room temperature using IAD-derived high-quality semiconducting In 2 O 3 and organic spin-coatable polymer gate dielectrics. Clear field-effect responses were observed for ZnO-based TFTs with complete light- and air-stability. The results on ZnO-based TFTs further support that such a hybrid approach can be extended to the use of various other semiconducting metal-oxide materials.

Such results demonstrate that hybrid integration of an oxide semiconductor, as illustrated by representative In 2 O 3 and nanoscopic organic dielectrics provides room-temperature fabricated transparent TFTs with performance unobtainable via conventional approaches. Such a hybrid TFT strategy is applicable to other oxide-based TFT structures bottom source-drain contacts, top gate, etc. While the utility of this invention is illustrated through the use of several components and device configurations, it will be understood by those skilled in the art that comparable results are obtainable with various other components, devices or configurations thereof as are commensurate with the scope of this invention.

TFT Fabrication. The nanoscopic organic gate dielectrics SAS, three 5. Polyvinylphenol and 1,6-bis trichlorosilyl hexane were purchased from Aldrich and Gelest, respectively. The In 2 O 3 target During the semiconducting In 2 O 3 deposition process, the growth system pressure and O 2 partial pressure were optimized at 4. The growth rate of the In 2 O 3 thin films was 3.

During the In 2 O 3 drain- and source-electrode deposition, the growth-system pressure and O 2 partial pressure were at 2. A top-contact electrode architecture was used in TFT device fabrication. Further details concerning organic dielectric growth and device fabrication are provided in the aforementioned incorporated references and are also reported in the literature. See, Yoon, M. In 2 O 3 film thicknesses were verified using a Tencor P step profilometer by etching a step following film growth.

Optical transmittance spectra were acquired with a Cary ultraviolet-visible-near-infrared spectrophotometer and were referenced to the spectrum of uncoated Corning F glass.

High-performance transparent thin-film transistors

Conductivities of the semiconducting In 2 O 3 thin films were measured with a Keithley A nanovoltmeter and current source. TFT device characterization was carried out on a customized probe station in air with a Keithley subfemtometer and a Keithley source meter, operated by a locally written Labview program and GPIB communication.

The ZnO thin film growth conditions were similar to those of In 2 O 3 , above. The energies currents used to produce the primary and assisted ion beams were W mA and 75 W 37 mA , respectively. The system growth pressure and O 2 partial pressure were 2.

The growth rate of ZnO thin films was 4. The ZnO films exhibited clear field-effect n-type response. ZnO TFTs show a field-effect mobility of 0. While the principles of this invention have been described in connection with specific embodiments, it should be understood clearly that these descriptions are added only by way of example and are not intended to limit, in any way, the scope of this invention. For instance, the present invention can comprise various silicon gallium-arsenide and other Group II-V semiconductor components.

Associated Data

Likewise, the present invention contemplates various other device structures, in addition to thin film configurations. Effective date : Year of fee payment : 4. Inorganic semiconducting compounds, composites and compositions thereof, and related device structures. Example 1 TFT Fabrication. Example 2 Characterization. A thin film transistor device comprising an inorganic-organic hybrid thin film composition, the inorganic-organic hybrid thin film composition comprising an inorganic semiconductor component deposited directly on and contacting an organic dielectric component, wherein the inorganic semiconductor component comprises a metal oxide comprising indium.

The device of claim 1 , wherein the inorganic semiconductor component is In 2 O 3. The device of claim 1 , wherein the organic dielectric component comprises a dielectric polymer. The device of claim 3 , wherein the dielectric polymer is selected from poly vinylphenol , polystyrene, and copolymers thereof. The device of claim 5 , wherein at least some of the periodically alternating layers are coupled to an adjacent layer by a coupling layer comprising a siloxane matrix. The device of claim 1 , wherein the inorganic-organic hybrid thin film composition is coupled to a substantially transparent substrate.

The device of claim 1 , wherein the organic dielectric component is coupled to a gate substrate, and the inorganic semiconductor component is an n-channel layer deposited directly on and contacting the organic dielectric component. The device of claim 1 , wherein the device is a transparent thin film transistor. The device of claim 10 , wherein the inorganic semiconductor component is In 2 O 3. The device of claim 10 , wherein the inorganic-organic hybrid thin film composition is coupled to a substrate selected from glass, silicon, an indium oxide material, and a flexible plastic material.

The device of claim 15 , wherein the inorganic semiconductor component is derived from a metal oxide target comprising indium. The device of claim 16 , wherein the inorganic semiconductor component comprises a room temperature ion-assisted deposition product of a metal oxide comprising indium. The device of claim 16 , wherein the inorganic semiconductor component comprises a sputtered metal oxide comprising indium. The device of claim 16 , wherein the organic dielectric component comprises a polymer blend, the polymer blend comprising a polymeric component and a component comprising hydrolyzable moieties.

The device of claim 16 , wherein the organic dielectric component comprises a polymer blend, the polymer blend comprising a polymeric component and a component affording substrate sorption, condensation, or intermolecular crosslinking. USP true Inorganic-organic hybrid thin-film transistors using inorganic semiconducting films. USB2 en. WOA2 en. Support structures for an attachable, two-dimensional flexible electronic device.

Semiconductor thin film, method for manufacturing the same, thin film transistor, and active-matrix-driven display panel. USB1 en. Gate-planarized thin film transistor substrates and related methods of fabrication. Carbon nanotube dispersing agent, carbon nanotube composite, carbon nanotube film, and method for manufacturing the carbon nanotube film. WOA1 en. JPB2 en.

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